Anjul Patney Ph.D. Student Department of Electrical & Computer Engineering University of California, Davis
	email url	anjul.patney at gmail dot com   http://idav.ucdavis.edu/~anjul

I'm a PhD student at University of California, Davis. I work with Prof. John Owens.

Before moving to Davis, I was an undergrad at Indian Institute of Technology, Delhi. I received my B.Tech. in Electrical Engineering in August 2007.

Here's my CV (PDF). It was last updated in September 2008.

Current Research

I'm spending summer 2008 with the Intel Larrabee Architecture Group.

At school, I'm working on modeling performance and writing optimizers for programs running on Graphics Processors. In my free time, I like to play with my GPU implementation of the Reyes pipeline.

Publications

Real-Time Reyes-Style Adaptive Surface Subdivision
Anjul Patney and John D. Owens.
ACM Transactions on Graphics (ACM SIGGRAPH Asia), December 2008 (to appear)

Texture Filter Memory - A Power-efficient and Scalable Texture Memory Architecture for Mobile Graphics Processors
B. V. N. Silpa, Anjul Patney, Tushar Krishna, Preeti Ranjan Panda, and G. S. Visweswaran.
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2008 (to appear)

Efficient computation of sum-products on GPUs through software-managed cache
Mark Silberstein, Assaf Schuster, Dan Geiger, Anjul Patney, and John D. Owens.
In Proceedings of the 22nd ACM International Conference on Supercomputing, June 2008

"Somewhere, something incredible is waiting to be known." - Carl Sagan

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